Hopscotch
Alif Ahmed, Kevin Skadron · Proceedings of the International Symposium on Memory Systems · 2019
Due to the ever-increasing gap between the speed of processing elements and the speed at which memory systems can feed them with data, current computing systems are often bottlenecked by memory bandwidth. Researchers are developing new memory architectures and concepts such as near-data-processing and processing-in-memory to overcome this issue. Memory benchmarks with different access patterns are essential to evaluate the performance of these emerging architectures. Existing memory benchmarks either support only sequential or random access patterns and do not provide tunability, or provide it in very limited scopes. We, therefore, present Hopscotch, a micro-benchmark suite in which the access pattern of read-only, write-only, and mixed accesses can be tuned to cover a wide spatio-temporal locality spectrum. We evaluated three platforms using our benchmark, one of which uses a 3D-stacked hybrid memory cube as on-chip memory.