HSTL and HSUL I/O Standard Based Energy-Efficient Control Unit Circuit Design on FPGA
Keshav Kumar, Pushpanjali Pandey · Gyancity Journal of Electronics and Computer Science · 2019
World is facing a huge problem of power deficiency. That's why power and energyefficient devices are getting more attention these days. This work highlights the energy-efficient control design implementation on 28nm technology Artix-7 Field Programmable Gate Array (FPGA). The implementation is done on the Vivado 2014.2 Design Suite. In this work, the Input/Output (I/O) Standard is varied at both input and output end of control unit circuit for calculating the power utilization of the control unit circuit with 28-nm FPGA. It is observed that High-Speed Unterminated Logic (HSUL_12) I/O Standard consumes the least amount of power when the control unit circuit is implemented on 28-nm FPGA.