A Comparative Study on Automated Fault—Tolerant Route Discovery with Congestion Control Using TFRF Model for 3-D Network-on-Chips
Sapna Tyagi, Amit Agarwal, Vinay Avasthi, Piyush Maheshwari · Journal of Applied Security Research · 2019
In recent times, with the capaciousness of on-chip cores endorsed over rapid technology scaling, network-on-chips (NoCs) are turning out to be a crucial element of entire system power performance characteristics. 3D-NoCs has been contributed as an auspicious solution merging the high parallelism of NoCs interconnect paradigm with the high-performance and lower interconnect-power of 3-dimensional Integrated Circuits (ICs). For the permanent link faults, an impressive mechanism contemplated is the fault-tolerant routing scheme to provide the performance of the 2-D NoCs. In this article, our proposed Triggered Fault-Free Route Forwarding model (TFRF) for 3-D Mesh NoCs without desiring any virtual channels (VCs) is compared with existing approaches with the intention of validating the performance. The experimental results of our proposed TFRF is evaluated and the performance is enhanced in terms of reliability with minimized overhead and the analytical phase details of the evaluation outcomes.