MITRACA: Manycore Interlinked Torus Reconfigurable Accelerator Architecture
Riadh Ben Abdelhamid, Yoshiki Yamaguchi, Taisuke Boku · 2019
Big data, Artificial Intelligence, and cloud services are emerging technologies whose power consumption due to the tremendous amount of computing resources became a significant issue in data centers. FPGA (Field Programmable Gate Array) based accelerators may offer a convenient solution for high-performance and energy-efficient computing. However, designing these accelerators using hardware description language is a burdensome task and requires specialized skill sets. To help not only FPGA engineers but also software programmers to implement their applications quickly, an overlay architecture on an FPGA will be a good candidate. Thus, this paper proposes a coarse-grained overlay architecture with SIMD (Single Instruction Multiple Data) instructions.