FPGA Implementation of Present Algorithm with Improved Security
Vallish Kumar Reddy, R. Arul Surya, Akhil Reddy, P. Sathish Kumar · 2019 3rd International conference on Electronics, Communication and Aerospace Technology (ICECA) · 2019
In recent times, the need of information security has grown widely and especially the study of lightweight symmetric ciphers among all the cryptographic algorithms has gained huge interest. The reason for this enlarging demand for cryptography is due to the ever-increasing insecurities particularly in the resource limited devices like the IoT (Internet of Things). The prime focus of this paper is to consider the variety of hardware architectures of a lightweight cipher PRESENT, which acquired its fame as a resource conservator as well as a tough cipher. This lightweight cipher can be used in Home automation and IoT related devices. In this paper, individual focus is laid on area minimization and security improvement. The 4-bit iterative architecture implemented in this paper saves area which makes it suitable for resource constraint devices like RFID Tags. Also, a modified key-dependent architecture is implemented with high potential to resist security threats which can be used in IoT setups where data suffers severe breaches.