600MSPS Direct Digital Synthesizer with Amplitude Control for a Cold Atom Gravimeter
D. Rivas, S. Bell, Matthew J. Clapp, Thomas Gardiner, Lawrence S. Jones, Q. Morrissey, Nick R. Waltham · 2018
This paper discusses a compressed-ROM 600MSPS dual-branch Direct Digital Synthesizer (DDS) providing sinewaves of80dBc. It supports positive chirp slopes up to 40MHz/s with ~1.3kHz/s resolution. The amplitude can be shaped with Gaussian envelopes of FWHM 2μs-2ms and SLRR >85dB. Any other envelope can be generated by pulsing programmable-step increment/decrements through dedicated LVDS inputs. The ASIC delivers two 14-bit 300MSPS LVDS buses to interface with an external DAC using a ping-pong arrangement. The output data is synchronous to a DDR clock coming from the DAC, which can pass through a programmable delay-line to adjust the loop phase. A demonstrator chip was manufactured in 0.18μm CMOS process.