A Low Power Hardware Implementation of Lifting based Reversible Watermarking for Medical Image
Poulami Jana, Goutam Kumar Maity, Himadri Shekhar Mandal · 2019 Devices for Integrated Circuit (DevIC) · 2019
A lifting domain reversible data hiding is presented here. A content based watermark is produced from selective (4×4) sized coefficient blocks of particular sub-band. One covert key is utilized to secure the watermark for access management which is specified by user. The secure watermark is implanted within same coefficient block (4×4). In receiver side the retrieval of original image is done by the authentic user's secure key. For real time application the `very large scale integration' (VLSI) architecture of this proposed encoder is designed in hardware. Simulation of the encoder is done by `field programmable gate array' (FPGA) kit. The experimentation is performed over a range of benchmark images. The results justify the supremacy of the method. The encoder module consumes only 59.20mW power when operated at 120.135MHz frequency in case of real time implementation.