δ-error elimination using truncation retention method and implementation on FPGA for non-redundant CORDIC
Yang Gao, Jian Liu, Zhiwu Zhang · Journal of Physics Conference Series · 2019
In this paper, δ -error is concerned and eliminated in digital implementation of CORDIC algorithm. An analysis on the accumulation mechanism of the computing error which leads to δ -errors is first conducted. And a truncated bits retention method is proposed to compensate the accumulated computing errors and eliminate δ -errors. Results of numerical simulations show that δ -error elimination and calculation accuracy improvement are achieved with the increase of SY even for extremely small inputs. Hardware implementation and resource consumption are also discussed.