Synthesis of Distributed Control Circuits for Dynamic Scheduling across Multiple Dataflow Graphs
Sayuri Ota, Nagisa Ishiura · 2019 34th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) · 2019
This article presents a method for synthesizing circuits with distributed control from CDFGs (control dataflow graphs). The distributed control attempts to harness a datapath with multiple FSMs (finite state machines) to adjust execution timing of operations dynamically, by which wasteful waits caused by variable latency units are reduced. Although Shimizu and Nakano proposed distributed control schemes which allowed dynamic scheduling across multiple DFGs (dataflow graphs), they just presented example controllers which were manually designed. This article shows a formulation to make the multiple FSMs work in ensemble based on the Nakano's scheme, along with some restrictions on CDFGs to allow automatic synthesis. Experiments on two CDFGs with various bindings demonstrates that the execution cycles are reduced by 8.5% in the best case at the cost of 13% increase on the circuit size on the average.