Accelerator-in-Switch: A Novel Cooperation Framework for FPGAs and GPUs
Hideharu Amano · 2018
Summary form only given, as follows. The complete presentation was not made available for publication as part of the conference proceedings. A large-scale FPGAs have been used as high-performance switches which connect powerful computational accelerators including GPUs. In most cases, the FPGA has a room of implementing additional accelerators which can treat on-the-fly data in the switch directly. Here, we introduce two implementation examples: one is for a low latency switching hub PEACH3 for high-performance scientific computing, and the other is FiC-SW for AI computing in a cloud. The key technique is how to use the partial reconfiguration and HLS description for the accelerator-in-switch.