A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS Technology
Chou Yuan-Hsi, Shih‐Lien Lu · 2019
Advanced Encryption Standard (AES) is a specification for electronic data encryption. This standard has become one of the most widely used encryption method and has been implemented in both software and hardware. AES has excellent resistance against linear and differential cryptanalysis. Although the standard itself is algorithmically secure, based on the implementation, it can be vulnerable to attackers through side channels. For example, it has been shown that by measuring the implementation's power and performing statistical analysis on multiple traces the secret key used can be unveiled. This paper presents an efficient hardware based 128-bit AES design using a masking scheme which is resistant to a side channel attack. This masked design is implemented in TSMC 22nm technology. The resulting implementation is high in performance, low in energy and silicon area. It can run at more than 400MHz translating to a throughput of 5.12Gbps. The total area of the AES block is 0.0169mm2. The energy consumption is at 9.77pJ/bit or 1.25nJ/block.