Yet Another Sieving Device
Willi Geiselmann, Rainer Steinwandt · 2003
A compact mesh architecture for supporting the relation collection step of the number eld sieve is described. Diering from TWIRL, only isolated chips without inter-chip communication are used. According to a preliminary analysis for 768-bit numbers, with a 0:13 m process one mesh-based device ts on a single chip of (4:9 cm) |the largest proposed chips in the TWIRL cluster for 768-bit occupy (6:7 cm) .