Very Massive Hardware Merge Sorter
Makoto Saitoh, Kenji Kise · 2018
The state-of-the-art hardware merge sorter called MMS has the tie-record issue that the records having the same key can cause the problem. MMS solves this issue by inefficient scheme comparing both key and satellite data fields of records to determine whether two records are swapped or not. We propose a high-performance hardware merge sorter (VMS) which adopts an efficient solution to the issue comparing just key fields. We also present the detailed circuit of VMS that adopts some implementation optimizations. We implement and evaluate VMS on a Virtex-7 FPGA. The evaluation results show that our proposed merge sorter requires fewer hardware resources and achieves 1.44x better throughput than MMS when large records are used.