Circuit ORAM: On Tightness of the Goldreich-Ostrovsky Lower Bound
Xiao Shaun Wang, T-H. Hubert Chan, Elaine Shi · 2014
Oblivious RAM (ORAM) constructions have traditionally been measured by their bandwidth cost, or the blowup in the ORAM’s running time in comparison with the non-oblivious baseline. While these metrics can suitably characterize an ORAM’s performance in secure processor and cloud outsourcing applications, recent works have observed that other applications such as secure multi-party computation demand a different metric, namely, the ORAM’s circuit complexity. Following the tree-based ORAM paradigm by Shi et al., we propose a new ORAM scheme called Circuit ORAM. Circuit ORAM achieves O(D logN)ω(1) total circuit size1 (over all protocol interactions) for memory words of D = Ω(log2 N) bits, while achieving a negligible failure probability. For memory words of D = Ω(log2 N) bits, Circuit ORAM achieves smaller circuits both asymptotically and in practice than all previously known ORAM schemes. Empirical results suggest that Circuit ORAM yields circuits that are 8x to 48x smaller than Path ORAM for datasets of roughly 1GB. The speedup will be even greater for larger data sizes. Circuit ORAM is also theoretically interesting when interpreted under the traditional metrics. Pa-rameterizing the scheme slightly differently, we show the following. Let 0 < < 1 denote any constant, and consider a family of RAMs with N words each of which N bits in size. Any RAM in this class can be compiled to an Oblivious RAM with O(1) words of CPU cache, running in O(T logN)ω(1) time, and achieving negligible statistical failure probability (or running in O(T logN) time but with inverse polyno-mial failure probability). This suggests that certain stronger interpretations of the Goldreich-Ostrovsky ORAM lower bound are tight — in particular their lower bound trivially generalizes to any O(1) failure probability, and works for arbitrary memory word sizes. 1