A Simulation Environment of Embedded Control Systems for Multi-Core Processors (WiP Report)
Yukikazu Nakamoto, Daichi Minami, Shota Shiba, Yoshitaka Koga, Koji Fukuoka · 2018
A multi-core processor trend is spreading in control-oriented embedded systems such as in-vehicle systems. By using multi-cores, the performance can be improved when controlling objects. In this paper, we present a simulation environment for multi-core processors to enable the testing of program behavior and the evaluation of control performance. The simulator consists of two functions: a target CPU instruction simulator and a target OS simulator. These two simulators provide simulated functions corresponding to CPU instructions and OS functions, respectively, as well as the predicted execution time in the target system. We developed a target CPU instruction simulator that provides assembler level translation and a synthesis of measured instruction execution times. We simulated the multi-core related APIs of an embedded OS using the multi-threaded functions of the host OS. The target CPU and the embedded OS are an RH850 by Renesas and an Autosar OS, both of which are widely used in the automotive field.