Fault Classification and Coverage of Analog Circuits using DC Operating Point and Frequency Response Analysis
S. Sanyal, Shan Pavan Pani Krishna Garapati, Amit Patra, Pallab Dasgupta, Mayukh Bhattacharya · 2019
Detection of faults in a mixed-signal SOC at the pre-silicon stage is a challenge, especially when it has substantial analog components. Given the time taken for simulating analog circuits, designing tests to detect faults in them is not a straightforward task. Achieving a high fault coverage without doing extensive time-consuming transient simulation of the circuit under test (CUT) has remained elusive in the analog and mixed-signal (AMS) domain. Unlike test generation approach for digital designs which leverage logical equivalence between faults, in analog circuits, there does not exist any notion of logical equivalence, and therefore each fault needs to be treated independently. In this paper, we propose to use a combination of DC operating point analysis and AC analysis of the CUT to identify equivalent faults in analog circuits. We also put forward a methodology of synthesizing inputs which will be able to detect the faults during post-silicon testing. Our studies reveal the effectiveness of this approach in identifying equivalent faults and achieving high fault coverage with considerably reduced computations. By using proposed methodology of fault classification and input signal synthesis, we have been able to achieve a high fault coverage where most of the detectable faults are successfully covered.