Test Configuration Generation for Different FPGA Architectures for Application Independent Testing
Shukla Banik, Suchismita Roy, Bibhash Sen · 2019
This paper presents a FPGA interconnect test configuration generation strategy for application-independent testing scenario using Satisfiability Modulo Theory (SMT). The technique generates all possible configurations for the interconnect to obtain full fault coverage. To generate test configurations automatically, constraints have been designed using SMT. The proposed technique targets open and short faults in the inter-connect resources. Test configurations have been generated for different FPGA architectures. The objective of the proposed approach is to minimize number of configurations without reducing the fault coverage. Experimental results show that the proposed strategy can obtain the minimum number of test configurations with 100% fault coverage, with respect to the fault list.