Synthesizing Performance-Aware (m, k)-Firm Control Execution Patterns Under Dropped Samples
Sumana Ghosh, Soumyajit Dey, Pallab Dasgupta · 2019
Performance of control loops often degrade due to various possible environmental disturbances in the control platform, like late arrival of sensor data, or corrupted readings due to transient noise. Such failures usually manifest as drops in control loop execution leading to unavailability of fresh control signals. In the existing literature, there is an absence of analytical methods which can compute the required patterns of control execution such that the performance of associated control loops remain satisfactory in the presence of such platform level timing uncertainties. We consider such platform level uncertainties as a collection of window based 〈m, k〉-firm specifications and synthesize an 〈m, k〉-firm based input specification for the execution patterns of the loops, so that performance can be provably ensured. Our methodology leverages Buchi automata for modeling platform uncertainties as 〈m, k〉-firm constraints and bounded model checking approach for synthesizing 〈m, k〉-firm based input specifications for the control loops.