Designing of an Energy-Efficient Nanoelectronics Architecture for Binary Comparator Based on Quantum-Dot Cellular Automata
Neeraj Kumar Misra, Bibhash Sen, Subodh Wairya · 2018
Quantum-dot cellular automata is a nanoscale computation circuit design approach which computes bits via charges among quantum-dot in the quantum cell of QCA. This technology has promises the feature of energy efficient and high density in the era of high-speed nanotechnology. This article contributes a new nanoscale design of binary comparator with less latency, area, and clock utilized. The proposed comparator architecture is robust and enjoys wire crossing without any crossover, which needs only normal and rotated cells. All the simulation results and calculated parameters are based on the QCADesigner tool. QCAPro tool based approach has been used to perform the energy dissipation estimation of the new comparator architecture. A better primitives results as compared to state-of-art technology has been achieved and good contribution in this area.