Evaluation and Detection of Hardware Trojan for Real-Time Many-Core Systems
Suvadip Hazra, Jaswanth Sai Sattenapalli, Arka Roy, Mamata Dalui · 2018
Due to the growing complexities of Integrated Circuits (ICs) and the current trend of Intellectual Property (IP) based hardware designs, the possible threats of Hardware Trojans are inevitable. Trojans can be inserted during the design or fabrication phase of the IC design cycle by an untrustworthy third party. A Trojan once implanted in a system component can cause an unintended modification in the system functionality resulting in a considerable performance penalty or even a system crash. The malicious activity by a Trojan may include access to highly sensitive data, thus increasing the system vulnerability. A malicious Trojan once activated, can continue to inject memory transaction through the system interconnect. Such memory transactions may result in unnecessary invalidation broadcast as well as the eviction of valid cache lines and hence resulting in a huge degradation in system performance. Even a malicious activity by a Trojan can designate an upper level cache hit for a cache line to a cache miss resulting in a Denial-of-Service (DoS) attack. This type of attack in turn greatly increases lower level memory traffic. In this work, we have considered such stealthy Trojans and evaluate their effects on the performance of a real-time many-core system. We have used machine learning based techniques for run-time detection of such Trojans. Simulation results show more than 95% accuracy in detection.