FPGA-Based Acceleration of Word2vec using OpenCL
Taisuke Ono, Tomoki Shoji, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yuichiro Aoki, Yuki Kondoh, Yaoko Nakagawa · 2019
Word2vec is a word embedding method that converts words into vectors in such a way that the semantically and syntactically relevant words are close to each other in the vector space. The processing time of Word2vec is very large due to the huge data size. We propose a power efficient FPGA-based accelerator designed using OpenCL. We achieved 13.4 times speed-up compared to single-core CPU implementation with only 53W of power consumption. The proposed FPGA-based accelerator has the highest power-efficiency compared to existing top-end GPU-based accelerators.