Superimposed In-Circuit Fault Mitigation for Dynamically Reconfigurable FPGAs
Alexandra Kourfali, David Merodio Codinachs, Dirk Stroobandt · 2017
Reassuring fault tolerance in computing systems is the most important problem for mission critical space components. With the rise in interest of commercial SRAM-based FPGAs, it is crucial to provide runtime reconfigurable recovery from a failure. In this paper we propose a superimposed virtual coarse-grained reconfigurable architecture, embedded an on-demand three level fault-mitigation technique tailored for FPGA overlays. The proposed method performs run-time recovery via Microscrubbing. This approach can achieve up to 3× faster runtime recovery with 10.2× less resources in FPGA devices, by providing integrated layers of fault mitigation.