Design and Implementation of FPGA Based 32 Bit Floating Point Processor for DSP Application
Anand Burud, P. C. Bhaskar · 2018
The floating point arithmetic operations have discovered applications in the various different fields for the necessities for requirments high precision operation because of its incredible dynamic range, high accuracy and fast arithmetic operations. High accuracy is needed for the design and research of the floating point processing units. With the expanding necessities for the floating point operations for the fast high speed data signal processing and the logical operation, the requirements for the high-speed hardware floating point arithmetic units have turned out to be increasingly requesting. This paper deals with the design and implementation of the 32-bit floating point Processor with MAC unit for signal processing application. The Linear convolution and Circular convolution of signals is verified. The necessary code is written in the language Verilog. Xilinx 14.7 suite is used for software development and then implementation on Spartan 6 board. The designed DSP has instructions set and consists of 32-bit ALU, 32-bit X 32-bit parallel multiplier for single-cycle MAC operation, 2 addressing modes, 31 auxiliary register arithmetic units.