A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs
Jan Cordes, Maher Fakih · 2019
The emergence of artificial intelligence (AI) applications have shown great benefits in saving costs and at the same time in executing efficiently many of our daily life tasks. Yet the application of AI in the safety-critical embedded systems domain is still limited due to the high functional and extra-functional (real-time, power, memory) requirements these systems must fulfill. To tap the full potential of AI for embedded systems, a design-flow which systematizes the process of refining AI implementations from the software implementation level to hardware design level accompanied with a validation flow of functional and extra-functional requirements on each refinement level, is inevitable.