A Novel Approach towards Secure IO Transactions Implementation and Validation for Smart Phones
AK Sreenath, Kurian Dileep, Budamagunta Chaithanya · 2018
This paper presents the design and implementation of a novel hardware architecture for secure mobile transactions and the same was validated at pre silicon level. The digital world is heading through mobile transactions and the major issue on these transactions are its “security concerns”. The software solutions which are currently available in the market are not reliable and “hack proof”. Here comes a security solution to enforce hardware security. This paper demonstrates how security can be implemented at hardware level and how it can help the platform to block hackers from accessing transaction information. Latest secure platform development, has put forward the concept of hardware security called “IO SECURITY”. The pre silicon validation for hardware security implementation is challenging as it needs to mimic the real use case scenarios and real software driver behavior. This paper will give an insight into the hardware implementation details, validation details and the innovations in validation for “IO SECURITY” mode of operation. The proposed circuit is implemented in 14 nm and 10 nm process and the scenario is also validated at silicon level.