Performance Analysis of Higher Order FIR Polyphase Filter
S. Sreekanth, Pratima B. Shinde, G. Vijaya Durga · 2018
In this paper, Polyphase Finite Impulse Response (FIR) digital filter is designed and implemented by using 40 nm LP CMOS TSMC Library. For many digital channelized receivers and transmitters in digital communication systems the speed of FIR filter and latency are important factors. Polyphase filter is implemented with parallel approach in which parallel multipliers, adders and FFT block using the Radix-22algorithm are used. Radix-22uses few multipliers compared to Radix-2 algorithm. In this work high performance is achieved compared to conventional direct form design and other designs.