Three-bit fast error corrector for BCH codes on GPUs
Arul K. Subbiah, Tokunbo Ogunfunmi · 2019
Recent developments with General Purpose Graphical Processing units (GPGPU) within gaming and mobile platform has attracted researchers to contribute efficient methods to correct errors for Bose-Chaudhuri-Hocquenghem (BCH) codes. Three-bit error correction is widely used in Single Level Cell (SLC) flash memory arrays, and Optical Transport Networks (OTN). In this paper, we propose an optimized method for correcting three-bit errors in such system. Precisely, we optimize the kernel routine for key-equation solver to have better performance. We have devised an engine, on a GPGPU, that decodes code size of (n=1023, k=963, t=3) and compare it against the conventional inversion-less Berlekamp-Massey algorithm (iBMA). Then, we extend the same scheme to different code sizes, and the results have shown that there is a 20% increase in performance by reducing the latency incurred by the key equation solver routine.