A Novel Fault-Tolerant Routing Technique for Mesh-of-Tree based Network-on-Chip Design
Mohit Upadhyay, Monil K. Shah, P. Veda Bhanu, J. Soumya, Linga Reddy Cenkeramaddi, Henning Idsøe · 2018
Due to the increase in the number of processing elements in System-on-Chips (SoCs), communication between the cores is becoming complex. A solution to this issue in SoCs gave rise to a new paradigm called Network-on-Chips (NoCs). In NoCs, communication between different cores is achieved using packet based switching techniques. In the deep sub-micron technology, NoCs are more susceptible to different kinds of faults which can be transient, intermittent and permanent. These faults can occur at any component of NoCs. This paper presents a novel Fault-Tolerant Routing (FTR) technique for Mesh-of-Tree (MoT) topology in the presence of router faults. The proposed technique is compared with routing technique without any faults. The results show improvements interms of the number of data packets reaching to any given destination node from any source node in MoT network in presence of faults.