Fast Converging Distributed Pulse-coupled Clock Synchronization for Half-duplex D2D Communications over Multipath Channels
Onur Karatalay, Ioannis Psaromiligkos, Benoı̂t Champagne, Benoit Pelletier · 2018
Clock synchronization is a fundamental problem in distributed device-to-device (D2D) communications as envisioned in fifth generation (5G) wireless networks. To achieve synchronization, especially in out-of-coverage scenarios where no common reference point is available, devices can use distributed phase-locked loops (DPLLs). Although DPLLs provide accurate synchronization in ideal conditions, i.e., additive noise channel without propagation delays, dispersive multipath channels may significantly degrade t he synchronization performance. The choice of duplexing mode (full-duplex or half-duplex) also affects greatly the performance of a distributed synchronization scheme. Since full-duplexing is not yet a practical technology at the device side, in this work we consider distributed synchronization under the realistic assumption of half-duplex communication over multipath channels. We first present a new synchronization algorithm that allows devices to self-determine their transceiver mode, and then, we introduce a modified D PLL algorithm based o n iterative propagation delay estimation to improve synchronization performance. Numerical results show that when using the proposed algorithms, devices can achieve a steady-state timing error on the order of 1μs while allowing them to arbitrarily join or leave the synchronization process.