Stochastic Processors on FPGAs to Compute Sensor Data Towards Fault-Tolerant IoT Systems
Rui Policarpo Duarte, Horácio C. Neto · 2018
The continuous increase in the amounts of data received at the edges of the Grid is pushing the pre-computation of sensor data at the IoT device before communicating it over the network. Moreover, in the IoT context, devices are often required to operate under heavy power and area constraints and be subjected to harsh environments. However, in this context, traditional computing paradigms struggle to provide high availability and fault-tolerance. Stochastic Computing has emerged as a competitive computing paradigm that produces fast and compact implementations of arithmetic operations, while offering high levels of parallelism, and graceful degradation when in the presence of faults. Stochastic Computing is based on the computation of pseudo-random sequences of bits, hence requiring only a single bitstream per signal. In virtue of the granularity of the bitstreams, the bit-level specification of circuits, high-performance characteristics and reconfigurable capabilities, FPGAs are often adopted to implement and test such systems. This work presents a tool that takes a high-level specification and automatically creates a complete Stochastic Computing systems capable of interfacing analog sensors directly on the FPGA, and perform computations over the stochastic bitstreams. Moreover, the presented framework is also able to generate custom stochastic processing units, perform fault-tolerance tests, and report estimates on performance, resources and power. As a proof-of-concept, this paper presents two Machine Learning applications typical in the IoT context, implementing Karhunen-Loeve Transform for data compression and Neural Networks for classification.