Design of JESD204B Multi-Channel Data Acquisition and Playback System Based on SoPC
Jiadong Yuan, Min Xie, Siyuan Liu, Dengyue Zhai · 2018
This paper designs a multi-channel data synchronous acquisition and playback system to realize the function of synchronous data acquisition of ADC chips, Field Programmable Gate Array (FPGA) receiving and processing digital data, and DAC playback. Because the high-speed serial protocol JESD204B can easily realize the channel synchronization between the converters and the FPGA, and the serial interface eliminates the redundant associated clock, the system adopts JESD204B as the data interface. Based on the characteristics of good real-time performance, simple structure, flexibility and efficiency of the System of Programmable Chip (SoPC), the system uses SoPC technology to dynamically configure the chips and Intellectual Property (IP)cores through the Microblaze soft core processor. Finally, this paper completed the construction of the hardware platform for real-time signal acquisition and processing playback, and realized the expected functions of the system.