Token Ring Arbiters: An Exercise in Asynchronous Logic Design with Petri Nets
Kia Seng Low, Alex Yakovlev · 1995
Designing an asynchronous communication architecture in a VLSI system, we have the choice of either using a token ring or a bus. The token ring structure is often more reliable than the bus structure because of its point-to-point interconnection. In this paper, we study two alternative token ring arbitration protocols which we call Busy Ring Protocol (BRP) and Lazy Ring Protocol (LRP). Their performance evaluation shows that BRP allows better response time under higher request rates, while its major disadvantage is waste of activity, and hence power, if the request trac is relatively low. We describe the design of speed-independent control circuits for these two ring protocols. The initial specication of the protocol made in a Petri net is rened to a Signal Transition Graph, which is further implemented into a logical circuit by recently developed methods. The logical circuit involves, as a standard component, a two-way mutual exclusion (ME) element. The arbiter designs have been veried at all levels, using dierent Petri net interpretations. The nal check has been performed using Cadence HSPICE simulation tool. We conclude with the idea of a \\hybrid " approach, combining the advantages of both BRP and LRP. Index terms: arbiters, asynchronous circuits, design process, mutual exclusion, Petri nets,