Efficient Architectures of Fractional Wavelet Filter (FrWF) for Visual Sensors and Wearable Devices
Mohd Tausif, Abhinandan Jain, Ekram Khan, Mohd. Hasan · 2018
In this paper a novel architecture for computing low memory wavelet transform of an image using Fractional Wavelet Filter (FrWF) is proposed. A multiplierless version of the proposed architecture is also designed to reduce the critical path delay (CPD) as low as the delay of an adder. This reduction in CPD allows its use at higher operating frequencies, thereby resulting in higher throughput. In order to test the effectiveness of the proposed multiplierless architecture, its performance is compared with one of the best state-of-the-art architecture by implementing them on the same FPGA. The results show that the proposed multiplierless architecture has 78.6% lower CPD, 83.95% fewer LUTs, 84.3% fewer FFs and 38.16% lower dynamic power compared to that of the state-of-the-art architecture implemented. Moreover, the memory requirement of the proposed architecture is less than the existing state-of-the-art architectures. Therefore, the proposed architecture is suitable for computing wavelet transform coefficients of images on low memory devices and visual sensors.