Design and implementation of a high-speed recursive digital filter using online arithmetic
Jr. R. H. Brackert · 1989
This dissertation describes a novel design method using on-line arithmetic to implement a high-speed general purpose integrated circuit for fixed-point recursive digital filtering. To achieve a high sampling rate, an on-line multiply-add module is developed and used to implement the direct form II second-order filter structure. Important characteristics of on-line arithmetic are that it produces results most significant digit first, and that its digit cycle time is independent of the data wordlength. These features not only enable high-speed filtering, but also allow the elimination of all nonlinear oscillations in the filter without affecting the sampling rate, and effectively eliminate scaling of the filter's input data. The result is a high-speed digital filter that can realize any properly designed transfer function (using quantized coefficients), with the output of the filter within a quantization error of the ideal output (using the same limited precision coefficients). We present the approach used to implement the filter structure, the derivation of the on-line multiply-add algorithm, and its hardware design using a 1.5$\mu$ CMOS standard cell library. Also described is a method for eliminating nonlinear oscillations by increasing the filter's working precision.