Design of Delayed Ternary PUF Circuit Based on CNFET
Zhengyang He, Kai Ren, Jiayan Chen, Xinyi Dai, Zhao Pan, Yuejun Zhang · 2018
The Physical Unclonable Function (PUF) circuit generates a random, unclonable key by extracting random deviations of the manufacturing processes. In this paper, a delay ternary PUF (DT-PUF) circuit scheme based on Carbon Nanotube Field Effect Transistor (CNFET) is proposed. In this scheme, the two inputs and two outputs (2I2O) multi-value delay circuit and the multi-valued arbiter circuit is designed by the threshold controllable CNFET. Then, the ternary signals logic 0, logic 1 and logic 2 transmission delay path is realized by cascading multi-bit 2I2O multi-value delay circuits. Secondly, the delay deviation of the two identical transmission paths is set as the random source. With the help of ternary arbiter, the random delay competes to produce the unclonable ternary PUF output data. Finally, the proposed DT-PUF circuit is designed under 32nm CNFET standard model library, and the circuit is simulated and analyzed by HSPICE. Experiment results show that DT-PUF circuit has the correct logic function, and the distribution is 30.3%@logic 0, 36%@logic 1, 33.7%@logic 2, near ideal about 33.3%.