An Efficient Approach for Neural Network Architecture
Kasem Khalil, Omar Eldash, Ashok Kumar, Magdy Bayoumi · 2018
Neural network is one of the main concepts used in machine learning applications. The hardware realization of neural network requires a large area to implement a network with many hidden layers. This paper presents a novel design of a neural network to reduce the hardware area. The proposed approach reduces the number of physical hidden layers from N to N/2 while maintaining full accuracy with a minimal increase in time complexity. The proposed approach adopts the concept of multiplexing input and output layers of the neural network. The approach is implemented based on Tensorflow framework and Xilinx Virtex-7 FPGA. The simulation results show the accuracy of the proposed approach is the same as expected from traditional network, which uses N layers, while using only N/2 hardware layers. The hardware implementation results show the proposed approach saves 42% area.