CoLPUF : A Novel Configurable LFSR-based PUF
B. Srinivasu, P. Vikramkumar, Anupam Chattopadhyay, Kwok‐Yan Lam · 2018
In this paper, a new configurable LFSR-based PUF is proposed. This proposed design uses the LFSR states to generate different control signals for selecting the response bits from the ring oscillator frequencies. The main advantage of the design is by generating control signal from the LFSR with the given challenge, one can extend the length of the response by increasing number of states of LFSR without any corresponding increase in the hardware. The concept of constant-resource scalability can be adopted to any delay-based PUF design. The PUF design (128-bit response) is tested on an Artix-7 Nexys 4 FPGA board and results in uniqueness of 49.2%, uniformity of 48.5% and 47.8% bit-aliasing. The noisy bits are recovered using BCH error correction scheme and we obtained final response with a reliability of 99.99 %.