SPF: Selective Pipeline Flush
Vignyan Reddy Kothinti Naresh, Rami Sheikh, Arthur Pérais, Harold W. Cain · 2018
Branch mispredictions are inevitable in modern processors, but their high penalty in power and performance can be alleviated by selectively flushing the pipeline. In this paper, we present a practical technique to opportunistically determine the presence of correct path instructions in the processor pipeline and preserve those instructions instead of throwing them away. In our experiments, selective pipeline flush reduced the fetched instruction count by 7% (up to 26%), while increasing the performance by 2% (up to 15%).