Modeling and Efficiency Analysis of Clock Glitch Fault Injection Attack
Bo Ning, Qiang Liu · 2018
Clock glitch is a low-cost, widely used and non-invasive fault injection attack (FIA) technique. The goal of this work is to investigate which type of faulty behavior is expected when clock glitch is applied to hardware circuit, and how the fault behavior can be exploited with efficient cryptanalysis. Considering various plaintexts and glitch periods which have impact on clock glitch FIA, two types of fault models are built. The first model uses single plaintext and continuously decreases the glitch period to generate intensive faults, called SPIF model. The second model uses multiple plaintexts and injects single bit fault, called MPSF model. Based on detailed analysis, two enhanced models called eSPIF and eMPSF are also proposed. The efficiency of the four models are analyzed theoretically and then verified by experimental results by applying the four attack models to AES circuit. Experimental results demonstrate that the enhanced models are superior in terms of attack efficiency and success rate. The investigation results will give circuit designers new insights into what could happen to the circuit under the clock glitch attack and what countermeasures should be done.