384 TMAC/s FIR filtering on an Artix-7 FPGA using Prism signal processing
John Owen, Manus Patrick Henry · 2018
The Xilinx Artix-7 family of FPGAs has a peak DSP performance of approximately 1 TMAC/s. This paper describes a floating point FIR bandpass filter instantiation on an Artix-7 with up to 192 million taps, updated at up to 2 MHz, delivering an equivalent performance of up to 384 TMAC/s, while using only one third of the DSP resources on the FPGA. This has been achieved using Prism signal processing, a new recursive FIR filtering technique. Filter design is simple; a PC host HMI facilitates the immediate creation of new filter implementations. Examples of experimental results are provided.