AQSS: Accelerator of Quantization Neural Networks with Stochastic Approach
Takeo Ueki, Keisuke Iwai, Takashi Matsubara, Takakazu Kurokawa · 2018
In recent years, Deep Neural Network (DNN)s have become widely spread. Several high-throughput hardware implementations for DNNs have been proposed. One of the key points for hardware implementations of DNNs is to reduce their power consumption because DNNs require a lot of product-sum operations. Previous papers presented some accelerators using logarithmic quantization to reduce the power consumption by replacing multipliers with shifters. However, most of them are implemented only for inference. In this paper, an Accelerator of Quantization neural networkS with Stochastic approach (AQSS) is proposed. It uses a stochastic approach for logarithmic quantization, and enables DNNs to infer or to learn using logarithmic quantization. A prototype of AQSS is implemented on a field-programmable gate array (FPGA) (Intel Arria 10 GX 1150) and synthesized with Intel Quartus Prime 17.1 Standard Edition. As a result, it is confirmed to have 1.8 times the power efficiency of GPU.