Image Stitching and Matching Tool in the Automated Iterative Reverse Engineer (AIRE) Integrated Circuit Analysis Suite
David Bowman · CORE Scholar (Wright State University) · 2018
Due to current market forces, leading-edge semiconductor fabrication plants have moved outside of the US. While this is not a problem at first glance, when it comes to security-sensitive applications, over-production, device cloning, or design alteration becomes a possibility. Since these vulnerabilities exist during the fabrication phase, a Reverse Engineering (RE) step must be introduced to help ensure secure device operation. This thesis proposes several unique methods and a collection of tools to ensure trust assurance in integrated circuit design by detecting fabrication flaws and possible hardware Trojans using several image processing techniques; fused into a singular view of the design. This suite of tools, the Automated Iterative Reverse Engineer (AIRE), addresses these security concerns. AIRE is comprised of an Image Stitcher, Stitch Assembler, Design Parser, Image Matcher, and IC Image Fusion Viewer. These tools work in concert to assist the design validation test engineers in assessing and analyzing the structure and performance of the IC. The first tool, the Image Stitcher, is the focus of this thesis.