Implementing circuit of combined finite state machine with FPGAs
А. А. Баркалов, Larysa Titarenko, Я. Е. Визор, Oleksandr V. Matvienko · Problems of Informatization and Management · 2015
A method is proposed for synthesis of combined finite state machine (FSM) using field-programmablelogic arrays. The FSM circuit is implemented with embedded memory blocks. To detect the number ofmemory blocks, the method of replacement of logical conditions is used. An example is given forimplementing the proposed method. Conditions are obtained for application of the proposed method