Leaks or Not: A Framework for Evaluating Cache Timing Side Channel Attacks in SGX
Ying Wu, Weihao Zheng, Baolei Mao, Xiaoxue Wu · 2018
With the advent of Intel SGX processor, Intel is trying to prove that SGX can completely eliminate the security problems in cloud environment with assisted hardware. However, many studies have demonstrated that SGX cannot prevent some side channel attacks such as the spectre and meltdown attacks. Intel has focused on this issue and tried to solve it, but so far it has not yet released a powerful version. In this paper, we investigate related security works with SGX involving cache timing channel and speculative execution deeply. Based on SGX platform, we are going to take OpenSSL as a case study to validate SGX timing channel security. Besides, we are proposing a test framework to verify and assess whether and how much SGX influenced by timing side channel. Consisting of validating OpenSSL timing channel security and assessing secure cryptography implementation with timing channel mitigation measures in SGX, the framework will also motivate us to evaluate cache protection measures and perform trade-off between timing channel security and performance when using SGX.