Pipeline circuits to compute several expressions
Boris Ya. Steinberg, Anton Pavlovich Bagliy, Zh. M. Petrova, Oleg B. Steinberg · 2018
The paper is devoted to initial transformations of C programs before their automatic conversion by the compiler in the HDL-description of the corresponding electronic circuit. Transformations under review are designed to search for such a pipelining scheme, which is capable of calculating several different program cycles. The creation of such a pipeline calculator can lead to the saving of FPGA resources during the acceleration of the process and can save the time necessary for reprogramming the FPGA accelerator. It is expected that ORS (optimizing the parallelizing system) will be the basis for the implementation of such transformations. The optimum pipeline problem is computationally complex, but, in some special cas+es, it reduces to the well-known problem of line alignment.