Research and Design of a Novel Reconfigurable Cyclic Shift Unit
Zhongxiang Chang, M. F. Chen, Yunfei Sun · IOP Conference Series Materials Science and Engineering · 2018
In this paper, a high speed reconfigurable control bits generation algorithm for cyclic shift operations is proposed. The algorithm utilizes the characteristics of routing information when Inverse Butterfly multi level network supports cyclic shift. Moreover, it also integrates a kind of cyclic shift operations together, including cyclic shift and sub-word cyclic shift based on a bit width of 2 i (i = 1, 2, …). Based on this, the shifter is implemented, and the logic synthesis is realized in the SMIC 65nm process. The results show that when the proposed unit only supports cyclic shift operations, enhances the frequency by 3.6% ∼ 8.6% and reduces the area by1.4% ∼ 32%, compared with previously proposed solutions. When achieving a variety of cyclic shift operations, the frequency of our unit enhances the frequency by 5% and reduces the area by 6%.