Design for consecutive transparency of RTL circuits
Tomokazu Yoneda, Hideo Fujiwara · Institutional Repositories DataBase (IRDB) · 2002
This paper presents a design-for-consecutive-transparency method that makes a core (RTL circuit) consecutively transparent using integer linear program-ming. Consecutive transparency of a core guarantees consecutive propagation of arbitrary test/response se-quences from the core inputs to the core outputs with some latency. Therefore, it is possible to apply/observe arbitrary test/response sequences to/from an embedded core consecutively at the speed of system clock by using interconnects and consecutively transparent cores in an SoC. Experimental results show that the proposed method introduces lower area overhead compared to the bypass method that adds direct paths from PIs to POs with multiplexers.