Probabilistic approaches for verification of unlikely inserted errors in Hardware Description Languages
Venkata Sai Manoj Pasupuleti · OhioLink ETD Center (Ohio Library and Information Network) · 2016
With technology becoming more advanced each day and CMOS scaling being done proportionately to accommodate the size, speed and advancement in technology, more transistors are packed on to the same chip, thereby making fault tolerance, reliability and error detection an increasingly important design specification for processors.Unfortunately, for all practical purposes it is not possible to test the functionality of many digital integrated circuits chips exhaustively, since they can involve billions of components.Thus, there are no guarantees that all possible errors in the chip design and manufacture can be found.Therefore, random test vectors are usually generated which would help to test the functionality for most parts of the IC design.This leads to hardware I am hugely indebted to my advisor, Prof. Steven Bibyk, for providing me the opportunity to work under him.His constant