Supply-Chain Security Enhancement by Chaotic Wireless Chip-Package-Board Interactive PUF
Masanori Takahashi, Makoto Nagata, Noriyuki Miura · 2018
This paper presents a novel assembly-circuit boundary solution for semiconductor supply-chain security enhancement. Chip-Package-Board (CPB) interactive PUF is introduced to incorporates a history of CPB process/assembly variations into a device PUF ID generation. An incremental update of PUF ID through the supply chain extends the device ID traceability for tackling against malicious counterfeiting at not only chip fabrication but also package/board assembly steps. A wireless connectivity through inductive coupling of an on-chip coil is utilized for the interaction between a PUF circuit and package/board materials. No any additional fabrication or assembly processes are needed as the on-chip coil can be formed by using existing on-chip interconnect resources. A coupled chaos oscillator is employed as the PUF core for a good synergistic usage with the wireless connectivity at a high-frequency RF signaling regime. An inherent parametric sensitivity of chaos exhibits the ID uniqueness and unclonability stemmed from the CPB process/assembly static variations. This sensitivity however makes PUF to be susceptible to the dynamic disturbances in voltage and temperature. Associated instability is suppressed by an analog replica-based feedback compensation circuit with digital post-processing to guarantee the ID reproducibility. The proposed interactive PUF concept is successfully demonstrated with prototype measurement using a 0.18um CMOS test chip in a simple Chip-on-Board (CoB) assembly.