Obfuscation of Fault Secured DSP Design Through Hybrid Transformation
Anirban Sengupta, Shubha Neema, Pallabi Sarkar, Sri Harsha P, Saraju P. Mohanty, Mrinal Kanti Naskar · 2018
A DSP circuit is considered to be secure, if its functionality is designed to be hidden from an adversary. In other words to make a DSP design secured, its hardware architecture should not look obvious in terms of its functionality. Structural obfuscation plays a critical role in realizing this objective. In the context of transient fault secured DSP circuits, one of the popular design approaches is using dual modular redundancy (DMR). This established design practice makes the functionality of common fault secured DSP circuits architecture easily identifiable to an adversary. In this paper we propose a novel obfuscation in the context of fault secure DSP circuit that uses hybrid transformations in successive layers to completely transform the hardware architecture of the design at register transfer (RT) and gate level without disturbing its functionality and incurring any design overhead. Results indicate without incurring any design cost overhead, the proposed obfuscation achieves significant structural transformation at the gate level such that the functionality becomes un-obvious to an adversary.